{
  "title": "Accumulate C from K tiles",
  "caption": "Figure 2. Staged A/B values supply data for an output tile through shared memory and register fragments. Partial C accumulates from K tiles. The 3×3 grids and two iterations show structure, not hardware tile dimensions or measured traces. The author made this explanatory diagram.",
  "alt": "Tile-reuse flow: stage A/B values, multiply register fragments and accumulate one C tile across two illustrative K-tile iterations.",
  "sources": [
    {
      "path": "content/blog/2026-06-10_transformer-performance-matmul-gpu/post.md",
      "sha256": "9b2336976006590a0e49ec94aee527e754cd116fc4525ec748dadfb01e695203",
      "description": "Current article explanation, equations, assumptions and retained citations."
    },
    {
      "path": "research/dynamic-mechanisms-2026-10-21/before/content/blog/2026-06-10_transformer-performance-matmul-gpu/illustrations/01-matmul-tile-reuse-algorithm.svg",
      "sha256": "be44cf99f4e4cd93f17f3164ca01ac7b9dc13bbf99fd0fc7b689eb844cfbae32",
      "description": "Frozen prior illustration; exact pre-migration bytes retained."
    },
    {
      "path": "content/blog/2026-06-10_transformer-performance-matmul-gpu/illustrations/source-notes.json",
      "description": "Existing article illustration provenance, retained unchanged."
    }
  ],
  "limitations": [
    "The execution is an example. Playback time is not measured runtime."
  ]
}